The invention relates to a vertical deflection circuit for use in television receivers.
A television receiver employs a vertical deflection circuit to accomplish field scanning on a cathode ray tube. In many cases, an output stage of such a circuit has a class A configuration or a class B configuration. In general, class B configuration has higher power efficiency than a class A configuration, which efficiency is the ratio of power dissipation in deflection yoke to a total input in the vertical deflection circuit. A theoretical power efficiency in a vertical deflection circuit having a class B configuration in its output stage is about 67%. Due to a flyback pulse induced in a retrace period, however, power efficiency in a practical circuit is very low, being on the order of about 20%.
Recently, a vertical deflection circuit having class D configuration which has much higher power efficiency has been introduced. The circuit is minutely disclosed in U.S. Pat. No. 3,456,150. The circuit comprises pulse width modulation means where an input sawtooth waveform is modulated and converted to higher frequency pulses the width of which varies periodically, switch mode amplifying means which amplifys said width modulated pulses, demodulating means which converts the amplified signal of said width modulated pulses to the desired sawtooth waveform and a deflection yoke as a load for the circuit. Theoretical power efficiency of such a circuit is 100% because said amplifying means is operated in the switch mode. Power efficiency in a practical application of this circuit, however, is much lower than said theoretical efficiency due to power loss in the demodulating means.